2 4 Decoder Logic Diagram

Diagram

2 4 Decoder Logic Diagram. To make it work as a hardware you have to use the logic gate ic like 7404 for not gate and the 7408 for the and gate. This can be verified.

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The logic diagram of a 2 to 4 line decoder using nor gates only is as shown below. The 2 binary inputs labelled a and b are decoded into one of 4 outputs hence the description of 2 to 4 binary decoder. It is therefore usually described by the number of addressing ip lines the number of data op lines.

Octal to binary encoder is nothing but 8 to 3 encoder.

If you do it might look something like this. The block diagram of 4 to 16 decoder using 3 to 8 decoders is shown in the following figure. 74hct139 decodes two binary weighted address inputs na0 na1 to four mutually exclusive outputs ny0 to ny3. Its logic gate diagram is very similar to the 2 to 4 logic gates diagram combining a few extra not and and gates to generate the 8 required outputs.